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Michiel van der Vlag, Lionel Kusch, Alain Destexhe, Viktor Jirsa, Sandra Diaz-Pier and Jennifer S. Goldman
Global neural dynamics emerge from multi-scale brain structures, with nodes dynamically communicating to form transient ensembles that may represent neural information. Neural activity can be measured empirically at scales spanning proteins and subcellul...
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Zichao Shen, Neil Howard and Jose Nunez-Yanez
This paper investigates the energy savings that near-subthreshold processors can obtain in edge AI applications and proposes strategies to improve them while maintaining the accuracy of the application. The selected processors deploy adaptive voltage sca...
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Jordan Morris, Pranay Prabhat, James Myers and Alex Yakovlev
This work presents complex circuitry from subthreshold standard cell libraries created by geometric STI spacer patterning for bulk planar CMOS technology nodes. Performance/leakage granularity enhancement affords safer multi-Vt synthesis in aggressive vo...
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Manaswini Gangineni, Jaime Ramirez-Angulo, Héctor Vázquez-Leal, Jesús Huerta-Chua, Antonio J. Lopez-Martin and Ramon Gonzalez Carvajal
A high performance bulk-driven rail-to-rail fully differential buffer operating from ±0.3V supplies in 180 nm CMOS technology is reported. It has a differential?difference input stage and common mode feedback circuits implemented with no-tail, high CMRR ...
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Vinod Pralhad Tayade, Swapnil Laxman Lahudkar
Pág. 19 - 29
In recent years, demands for high speed and low power circuits have been raised. As conventional metal oxide semiconductor field effect transistors (MOSFETs) are unable to satisfy the demands due to short channel effects, the purpose of the study is to d...
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Chiara Elfi Spano, Fabrizio Mo, Roberta Antonina Claudino, Yuri Ardesi, Massimo Ruo Roch, Gianluca Piccinini and Marco Vacca
Tunnel Field-Effect Transistors (TFETs) have been considered one of the most promising technologies to complement or replace CMOS for ultra-low-power applications, thanks to their subthreshold slope below the well-known limit of 60 mV/dec at room tempera...
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Andrea Ballo, Salvatore Pennisi, Giuseppe Scotti and Chiara Venezia
A current-controlled CMOS ring oscillator topology, which exploits the bulk voltages of the inverter stages as control terminals to tune the oscillation frequency, is proposed and analyzed. The solution can be adopted in sub-1 V applications, as it explo...
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Francesco Centurelli, Riccardo Della Sala, Pietro Monsurrò, Giuseppe Scotti and Alessandro Trifiletti
In this paper, we introduce a novel tree-based architecture which allows the implementation of Ultra-Low-Voltage (ULV) amplifiers. The architecture exploits a body-driven input stage to guarantee a rail-to-rail input common mode range and body-diode load...
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Kitae Lee, Sihyun Kim, Daewoong Kwon and Byung-Gook Park
Ternary complementary metal-oxide-semiconductor technology has been spotlighted as a promising system to replace conventional binary complementary metal-oxide-semiconductor (CMOS) with supply voltage (VDD) and power scaling limitations. Recently, wafer-l...
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Seung-Hyun Lee, Jeong-Uk Park, Garam Kim, Dong-Woo Jee, Jang Hyun Kim and Sangwan Kim
In this paper, analysis and optimization of surrounding channel nanowire (SCNW) tunnel field-effect transistor (TFET) has been discussed with the help of technology computer-aided design (TCAD) simulation. The SCNW TFET features an ultra-thin tunnel laye...
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