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Muhammad Faisal Siddiqui, Mukesh Kumar Maheshwari, Muhammad Raza and Aurangzeb Rashid Masud
This article presents the design and optimization of a tunable quadrature differential LC CMOS voltage-controlled oscillator (VCO) with a D flip-flop (DFF) frequency divider. The VCO is designed for the low-power and low-phase-noise applications of 2.4 G...
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Yizhuo Liao and Pak Kwong Chan
A fully-integrated CMOS relaxation oscillator, realized in 40 nm CMOS technology, is presented. The oscillator includes a stable two-transistor based voltage reference without an operational amplifier, a simple current reference employing the temperature...
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Hsiao-Hsing Chou, Jian-Yu Chen, Tsung-Hu Tseng, Jun-Yi Yang, Xuan Yang and San-Fu Wang
In this paper, a new control scheme for buck converters was proposed. The buck converter utilizes the dual control loop to improve transient response and has the constant switching frequency. The control scheme is mainly as follows: (a) The switch-ON tim...
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Noora Almarri, Peter Langlois, Dai Jiang and Andreas Demosthenous
A power management unit (PMU) is an essential block for diversified multi-functional low-power Internet of Things (IoT) and biomedical electronics. This paper includes a theoretical analysis of a high current, single-stage ac-dc, reconfigurable, dual out...
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Javad Tavakoli, Hossein Miri Lavasani and Samad Sheikhaei
A low-power and low-jitter 1.2 GHz Integer-N PLL (INPLL) is designed in a 65 nm standard CMOS process. A novel high-gain sampling phase detector (PD), which takes advantage of a transconductance (Gm) cell to boost the gain, is developed to increase the p...
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