Resumen
In this paper, a new control scheme for buck converters was proposed. The buck converter utilizes the dual control loop to improve transient response and has the constant switching frequency. The control scheme is mainly as follows: (a) The switch-ON time is regulated by the constant frequency mechanism. (b) The switch-OFF time is regulated by the output voltage. The spec/features of the proposed converter are listed as: (1) The buck converter has an output of 1.0?2.5 V for the input of 3.0?3.6 V. The load current ranges from 100 mA to 500 mA. (2) The actual current sensor is not required. (3) The simulation results show that the recovery time is less than 1.6 µs during load changes. (4) The variation in switching frequency is smaller than 1.05% over the output range of 1.0?2.5 V. (5) This circuit can be fabricated in future by UMC 0.18 µm 1P6M CMOS processes. This paper depicts the control scheme, theoretical analysis, and implementation.