|
|
|
Eldred Lee, Kevin D. Larkin, Xin Yue, Zhehui Wang, Eric R. Fossum and Jifeng Liu
This article experimentally investigates the inception of an innovative hard X-ray photon energy attenuation layer (PAL) to advance high-energy X-ray detection (20?50 keV). A bi-layer design with a thin film high-Z PAL on the top and Si image sensor on t...
ver más
|
|
|
|
|
|
Yizhuo Liao and Pak Kwong Chan
A fully-integrated CMOS relaxation oscillator, realized in 40 nm CMOS technology, is presented. The oscillator includes a stable two-transistor based voltage reference without an operational amplifier, a simple current reference employing the temperature...
ver más
|
|
|
|
|
|
Javad Tavakoli, Hossein Miri Lavasani and Samad Sheikhaei
A low-power and low-jitter 1.2 GHz Integer-N PLL (INPLL) is designed in a 65 nm standard CMOS process. A novel high-gain sampling phase detector (PD), which takes advantage of a transconductance (Gm) cell to boost the gain, is developed to increase the p...
ver más
|
|
|
|
|
|
Agata Romanova and Vaidotas Barzdenas
The work reports on the development of a detailed noise current model for a low-noise capacitive feedback transimpedance amplifier (TIA) in CMOS. The proposed TIA circuit implements the programmable-gain using an array of discretely controlled feedback c...
ver más
|
|
|
|
|
|
Cristina Missel Adornes, Deni Germano Alves Neto, Márcio Cherem Schneider and Carlos Galup-Montoro
This work proposes a truly compact MOSFET model that contains only four parameters to assist an integrated circuits (IC) designer in a design by hand. The four-parameter model (4PM) is based on the advanced compact MOSFET (ACM) model and was implemented ...
ver más
|
|
|